Through my Master Thesis, SANDA, I explored two interesting topics in the field of Chip Design and AI accelerators: Block-Floating Point (BFP) and Bit-Serial Architectures. These two concepts, while seemingly distinct, share a common goal of optimizing computational efficiency and resource utilization in hardware design.
As I often say, the simplest ideas are often the best. In this post, I will present and explain the concepts of BFP and Bit-Serial Architectures, highlighting their significance in modern computing.
This blog post is a good appetizer for the upcoming post about SANDA, a self-Adaptive Variable-Precision Accelerator for Efficient LLM Inference based on ANDA. SANDA is my master thesis project at KU Leuven in Chip Design and electronics master.
Block-Floating Point (BFP)
